Capacitance-Voltage Characterization of LPCVD-Silicon Oxynitride Films

2001 ◽  
Vol 187 (2) ◽  
pp. 493-498 ◽  
Author(s):  
A. Szekeres ◽  
S. Alexandrova ◽  
M. Modreanu
Author(s):  
Satish Kodali ◽  
Chen Zhe ◽  
Chong Khiam Oh

Abstract Nanoprobing is one of the key characterization techniques for soft defect localization in SRAM. DC transistor performance metrics could be used to identify the root cause of the fail mode. One such case report where nanoprobing was applied to a wafer impacted by significant SRAM yield loss is presented in this paper where standard FIB cross-section on hard fail sites and top down delayered inspection did not reveal any obvious defects. The authors performed nanoprobing DC characterization measurements followed by capacitance-voltage (CV) measurements. Two probe CV measurement was then performed between the gate and drain of the device with source and bulk floating. The authors identified valuable process marginality at the gate to lightly doped drain overlap region. Physical characterization on an inline split wafer identified residual deposits on the BL contacts potentially blocking the implant. Enhanced cleans for resist removal was implemented as a fix for the fail mode.


Author(s):  
Sweta Pendyala ◽  
Dave Albert ◽  
Katherine Hawkins ◽  
Michael Tenney

Abstract Resistive gate defects are unusual and difficult to detect with conventional techniques [1] especially on advanced devices manufactured with deep submicron SOI technologies. An advanced localization technique such as Scanning Capacitance Imaging is essential for localizing these defects, which can be followed by DC probing, dC/dV, CV (Capacitance-Voltage) measurements to completely characterize the defect. This paper presents a case study demonstrating this work flow of characterization techniques.


2011 ◽  
Vol 239-242 ◽  
pp. 891-894 ◽  
Author(s):  
Tsung Fu Chien ◽  
Jen Hwan Tsai ◽  
Kai Huang Chen ◽  
Chien Min Cheng ◽  
Chia Lin Wu

In this study, thin films of CaBi4Ti4O15with preferential crystal orientation were prepared by the chemical solution deposition (CSD) technique on a SiO2/Si substrate. The films consisted of a crystalline phase of bismuth-layer-structured dielectric. The as-deposited CaBi4Ti4O15thin films were crystallized in a conventional furnace annealing (RTA) under the temperature of 700 to 800°C for 1min. Structural and morphological characterization of the CBT thin films were investigated by X-ray diffraction (XRD) and field-emission scanning electron microscope (FE-SEM). The impedance analyzer HP4294A and HP4156C semiconductor parameters analyzer were used to measurement capacitance voltage (C-V) characteristics and leakage current density of electric field (J-E) characteristics by metal-ferroelectric-insulator- semiconductor (MFIS) structure. By the experimental result the CBT thin film in electrical field 20V, annealing temperature in 750°C the CBT thin film leaks the electric current is 1.88x10-7A/cm2and the memory window is 1.2V. In addition, we found the strongest (119) peak of as-deposited thin films as the annealed temperature of 750°C


2004 ◽  
Vol 338-340 ◽  
pp. 76-80 ◽  
Author(s):  
M.I. Alayo ◽  
D. Criado ◽  
L.C.D. Gonçalves ◽  
I. Pereyra

2011 ◽  
Vol 109 (6) ◽  
pp. 064514 ◽  
Author(s):  
A. F. Basile ◽  
J. Rozen ◽  
J. R. Williams ◽  
L. C. Feldman ◽  
P. M. Mooney

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